Mux GPIO: AON CC, 3
Mux GPIO: AON CC, 3
J40 CAM: PWDN GPIO: Main AC, 0 CSI: serial_c lanes: 2 I²C Bus: 9 (Mux @1)
PWDN GPIO: Main Q, 5 CSI: serial_d lanes: 2 I²C Bus: 7 (i2c@c250000)
PWDN GPIO: Main H, 0 CSI: serial_b lanes: 2 I²C Bus: 1 (i2c@c240000)
PWDN GPIO: Main H, 6 CSI: serial_a lanes: 2 I²C Bus: 10 (Mux @0)
#define CAM0_PWDN TEGRA234_MAIN_GPIO(H, 6) // J43 #define CAM1_PWDN TEGRA234_MAIN_GPIO(AC, 0) // J40 #define CAMJ41_PWDN TEGRA234_MAIN_GPIO(Q, 5) // J41 #define CAMJ42_PWDN TEGRA234_MAIN_GPIO(H, 0) // J42 #define CAM_I2C_MUX TEGRA234_AON_GPIO(CC, 3) / { /* Add basic i2c mux */ cam_i2cmux { compatible = "i2c-mux-gpio"; #address-cells = <1>; #size-cells = <0>; mux-gpios = <&tegra_aon_gpio CAM_I2C_MUX GPIO_ACTIVE_HIGH>; i2c-parent = <&cam_i2c>; i2c@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; }; i2c@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; }; }; }; NVCSI DTS snippet